Imagine peeling off the packaging on your brand-new smartphone only to find a small crack in the screen. After a simple visual inspection, the device would immediately be returned or exchanged. Now, imagine your smartphone came with defects in its internal electronic parts. These defects are much more difficult to detect and can ultimately result in electronic failures.
Semiconductors are essential components of electronic circuits and can be prone to non-visual defects that arise during manufacturing. This challenge is exacerbated by the ever-increasing complexity of electronic systems that are housed in smaller devices.
Luckily, machine learning (ML) algorithms have been developed to help manufacturers address the problem by nabbing defective parts coming off production lines. Automated processes can bypass traditionally slow and labour-intensive quality control measures such as examining parts using electron microscopy.
However, training ML platforms to recognise subtle nano-scale structural anomalies is no small feat. Non-visual defects are so rare that it is difficult to gather enough data to build robust training models. Additionally, real-world data streams in sequentially rather than in large batches, which is not ideal for training reliable and responsive ML models.
J. Senthilnath, who leads the Autonomous Scientific Discovery group at A*STAR’s Institute for Infocomm Research (I2R), collaborated with teams from the National University of Singapore to create an online ML model to accurately catch transistor defects, even with existing training data limitations.
“Our goal in this work was to classify defect locations using the signals from non-destructive electrical measurements through an online ML approach,” explained Senthilnath.
The team combined activation functions in a deep neural network with leaky-ReLU membership functions in a neuro-fuzzy system. These features gave their algorithm the flexibility to distinguish between different defect types while simultaneously reducing the number of learning parameters needed to maintain accuracy.
“Defect detection can be achieved on-the-fly with less human involvement and retraining the model to recognise new defects,” said Senthilnath, adding that when tested, their ML framework outshone existing models, boasting classification rate improvements between 1.1 percent and 65.9 percent.
The online learning mechanism and evolving architecture of the team’s proposed algorithm could be just what the industry needs to create high-quality semiconductors at even smaller scales. To this end, Senthilnath said that the team has begun developing their defect-detecting ML platform for testing nano-scaled devices such as fin field-effect transistors (FinFETs).
“We started with device-level defect detection,” said Senthilnath. “Currently, we’re focusing on atomistic-level defect detection.”
The A*STAR-affiliated researchers contributing to this research are from the Institute for Infocomm Research (I2R).
